Senior AI Compiler Engineer – Automotive SoC

Role Summary

As an AI Compiler Engineer on the Renesas HPC team, you will be responsible for driving compiler and code generation technologies that unlock the full compute potential of Renesas next-generation automotive System-on-Chip platforms, including advanced 3 nm silicon for software-defined vehicles (SDVs). Your work will directly impact how AI workloads — from perception and sensor fusion to in-vehicle assistants and advanced driver assistance — are translated into highly optimized, safe, and power-efficient execution on Renesas hardware. This role bridges software compiler development, AI model lowering/optimization, and hardware-software co-design, enabling Renesas SoCs to deliver industry-competitive performance, efficiency, and functional safety required by multi-domain automotive applications.

What You'll Do

Implement and optimize AI compiler components across graph optimization, lowering, code generation, and runtime integration. Develop graph-level optimizations (operator fusion, quantization-aware rewrites, memory-aware scheduling, partitioning). Drive performance optimization for target NPUs, including tiling, tensor layout, and multi-core execution strategies. Collaborate with SoC and AI accelerator architects to ensure compiler-hardware alignment. Profile and benchmark compiler outputs against automotive AI workload KPIs using simulators and silicon-correlated models. Ensure compiler outputs meet automotive requirements (real-time behavior, determinism, quality expectations).

What We're Looking For

MS or PhD in Computer Science, EE, or related field (or equivalent experience). 3-8 years of experience in compiler development, AI framework optimization, or accelerator backend engineering. Experience with MLIR, LLVM, TVM-like systems, or proprietary compiler IRs. Strong C/C++ and Python skills. Solid understanding of AI inference workloads (CNNs, transformers, perception or generative models). Strong communication skills; agile development experience in a Scrum team (Scrum Master or member).

Nice to Have

Experience with automotive or safety-critical systems. Background in heterogeneous SoCs (CPU/GPU/DSP/NPU). Performance modeling or hardware-software co-design experience. LLM optimization experience (vLLM, TensorRT-LLM, ONNX Runtime). Open-source compiler or AI project contributions.

Impact & Why This Role Matters

Renesas' Gen5 R-Car automotive SoC lineup, including flagship 3 nm devices like the R-Car X5H, is among the first highly integrated multi-domain automotive SoCs built on advanced 3 nm process technology, designed to run ADAS, IVI, gateway, and next-gen SDV workloads on a centralized platform. These platforms deliver high AI performance (e.g., multi-hundreds of TOPS), scalable chiplet-based acceleration, and power efficiency tailored for electrified and autonomous vehicles while meeting stringent functional safety standards. An AI Compiler Engineer enables this hardware vision by ensuring that state-of-the-art AI models and computational kernels are efficiently mapped to the silicon fabric — directly enhancing performance, reducing latency and energy, and accelerating software adoption in automotive ecosystems where compute efficiency and safety are paramount.