Principal Engineer, NPU Architect

About the RoleWe are looking for a Principal NPU Hardware Architect with 10 to 15 years of experience to drive the architectural definition and hardware implementation of high-performance Neural Processing Units (NPUs) targeted for microcontrollers and microprocessors addressing automotive high-performance compute.This is a hardware-oriented role that requires a deep understanding of the full silicon lifecycle, combined with a strong background in hardware-software co-design to ensure the NPU architecture is highly optimized for compiler-driven execution and software stacks.Responsibilities• NPU Architecture & Dataflow: Define and own the end-to-end NPU micro-architecture, including high-throughput tensor/matrix engines, vector units, and specialized activation functional units.• Hardware-Software Co-Design: Partner closely with compiler and software teams to define instruction sets (ISA), memory management schemes, and hardware-aware graph optimizations.• Virtualization & Multi-Tenancy: Architect hardware-assisted virtualization features to enable secure resource sharing and multi-tenant execution in cloud or edge environments.• Interconnect & Fabric: Design and integrate high-bandwidth bus fabrics, including NoC and CHI, and DMA controllers optimized for the massive data movement inherent in AI workloads.• Infrastructure & Power: Lead the definition of SoC infrastructure elements, including complex clock/reset domains and advanced power management strategies to maximize performance-per-watt.• Performance Modeling: Develop bit-accurate and cycle-accurate C++/SystemC models to validate architectural choices and enable early software development.• Full Design Flow: Oversee the transition from architectural specification to RTL, providing technical leadership through verification, physical design, and post-silicon bring-up.Qualifications• Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering. PhD is desirable.• 12+ years of experience in AI accelerator, NPU, or GPU hardware architecture and RTL design.• Deep knowledge of deep learning primitives, including CNNs, Transformers, and RNNs, and how they map to spatial compute hardware.• Strong understanding of compiler backends, including LLVM and MLIR, IR transformations, and how hardware features such as scratchpad memories and tiling impact compiler efficiency.• Proven track record with modern SoC protocols, including AXI, ACE, and CHI, and integrating NPU cores into larger system-on-chip environments.• Expert-level proficiency in SystemC/TLM or C++ for architectural performance modeling and hardware-software co-verification.• Ability to act as a technical authority, mentoring junior designers and influencing cross-functional roadmaps.About the CompanyWe are a global semiconductor company delivering embedded semiconductor solutions across automotive, industrial, infrastructure, and IoT markets. The company offers a broad portfolio spanning high-performance computing, embedded processing, analog and connectivity, and power solutions.With a global team across more than 30 countries, we continue to advance scalable, sustainable, and power-efficient technologies that help customers build safer, smarter, and more connected systems.Why Join Us• Launch and advance your career across technical and business roles in a global semiconductor environment.• Make a real impact by developing innovative products and solutions that address evolving customer needs.• Work in a flexible and inclusive environment designed to support performance, collaboration, and wellbeing.Equal Opportunity StatementWe are an equal opportunity and affirmative action employer committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state, or local law.Export Control NoticeThis role may involve work with dual-use technology subject to U.S. export control regulations. In some cases, the company may need to obtain a U.S. government export license before releasing controlled technology to certain individuals. Any decision to file or pursue an export license application is at the company’s sole discretion.Work ModelThis is a hybrid role. Employees work remotely two days per week and come together in the office three days per week. The designated in-office days are Tuesday through Thursday for innovation, collaboration, and continuous learning.