ARM CPU Subsystem Design Leader
Japan
Engineering – Software Engineer / Full-Time / Hybrid
About the role
In this role, you will serve as a technical leader for the CPU subsystem within a flagship automotive SoC series, defining design direction, making sound technical decisions, and driving development forward.
This position spans in-house IP development through external IP selection, integration, and implementation, covering both technical leadership in core areas and collaboration with surrounding teams and IP vendors. You will own the CPU subsystem design strategy while making technical judgments across a diverse and growing set of integrated IPs, and work directly with internal teams and IP vendors to align on direction and resolve challenges.
We are looking for an engineer with deep hands-on CPU subsystem design expertise, the ability to define technical direction and drive consensus across teams, and the communication skills to operate effectively in a collaborative development environment.
This role offers an opportunity for engineers who wish to drive development with a strong technical foundation while preparing to take on broader responsibilities in the future.
Responsibilities
- Play a key role in specification definition and architectural study of the CPU subsystem for automotive SoCs (flagship automotive SoC series)
- Work on the CPU subsystem including CPU cores, cache architecture (L1/L2/L3, cache coherency), and memory-related areas, and organize design directions from a subsystem-level optimization perspective while owning a primary technical area
- During logic design and verification phases, identify and structure technical issues, contribute to design decisions, and help drive development forward
- Consider constraints such as power, performance, and reliability, and make technical judgments consistent with overall SoC requirements
- For integrated third‑party IPs, communicate with IP vendors to confirm specifications, clarify constraints/assumptions, and support issue resolution
- Collaborate with design teams in India and Vietnam and with IP vendors, working in English within a global development environment
Qualifications
- Hands-on experience in at least one of the following areas, including specification study, design, verification, or performance evaluation:
- CPU / processor cores (e.g., exceptions, interrupts, control logic)
- Cache architecture (e.g., cache hierarchy, coherency, memory consistency)
- Memory-related areas (e.g., interconnect, memory control, memory interfaces)
- Ability to organize design directions and key discussion points based on requirements and share them with stakeholders
- Understanding of the logic design and verification flow, and experience actively participating in technical reviews/discussions
- Communication skills to collaborate across teams and contribute to technical consensus building
- Willingness and ability to communicate in English for technical meetings and specification reviews
- Experience taking a technical lead role at subsystem or IP level (e.g., leading design reviews, guiding technical discussions)
- Experience with multi-core CPU systems and/or cache coherency mechanisms
- Experience in SoC integration involving CPU, cache, and memory-related components
- Knowledge of power domain separation and physical implementation considerations (e.g., P&R)
- Experience in automotive SoC development or design/verification with functional safety or reliability considerations
- Experience in technical communication and coordination with overseas sites and/or third‑party IP vendors
- Japanese language proficiency at a conversational level
Additional Information
- Location: Kodaira, Tokyo, Japan
- Work Model: Hybrid (3 days in-office, 2 days remote)
- Open to relocation: This role is open to candidates located anywhere who are open to relocating to Japan
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